Recent advances in semiconductor technology have been improving the integration level of logical LSI year by year, which makes a problem graver that the number of physical pins of a device falls short of a necessary number of signals. Most common method of eliminating such a shortage of the number of pins is multiplexing and transferring a plurality of pieces of data into one signal line on a time-division basis by using parallel-serial conversion (see e.g. Literature 1). In this case, a clock frequency for data transfer should be set to be higher than an operation clock of a device according to the number of signals to be multiplexed.
Literature 1: J. Babb, R. Tessier, and A. Agarwal, “Virtual Wires: Overcoming Pin Limitations in FPGA-based Logic Emulators”, in Proc. IEEE Workshop on FPGA-based Custom Computing Machines, Napa, Calif., April 1993, pp. 142-151.
Disclosed in Japanese Patent Laying-Open No. 11-73440 (Literature 2) is an emulation device which executes transmission and reception between devices with a signal to be multiplexed on a time-division basis and other signal appropriately mixed in view of a problem that an operating frequency of a circuit will be relatively decreased in signal transfer when simply using parallel-serial conversion.
The basic idea of the above-described related art is to enable transmission and reception of more signals than the number of physical connections between devices by virtually increasing the number of signal lines between the devices by time-division multiplexing. A dividing ratio of a clock for circuit operation to a clock for data transfer is determined only by the number of signals to be multiplexed to the pin and once a data transfer clock frequency is determined, speed-up of the operation of the entire system is impossible.
In addition, because a plurality of signals are multiplexed on a time-division basis to a physical connection between the devices, a time slot will be resultantly assigned to each signal irrespectively of existence/non-existence of a signal, which leaves a room for improvement in view of effective use of such a resource as a physical signal line.